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  • ...reaching an effective 1333 MHz bus (333 MHz x4) with this technique. Quadruple data rate is also used in the [[Accelerated Graphics Port]] (AGP) 4x bus. ...l of the first piece of information is unchanged. However, implementing a quadruple data rate bus is much easier and less expensive than quadrupling the speed of a bus (
    1 KB (213 words) - 15:24, 13 November 2007
  • 12 bytes (1 word) - 15:24, 13 November 2007
  • 133 bytes (18 words) - 15:06, 25 May 2008
  • Auto-populated based on [[Special:WhatLinksHere/Quadruple data rate]]. Needs checking by a human.
    441 bytes (58 words) - 19:50, 11 January 2010

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  • ...reaching an effective 1333 MHz bus (333 MHz x4) with this technique. Quadruple data rate is also used in the [[Accelerated Graphics Port]] (AGP) 4x bus. ...l of the first piece of information is unchanged. However, implementing a quadruple data rate bus is much easier and less expensive than quadrupling the speed of a bus (
    1 KB (213 words) - 15:24, 13 November 2007
  • Auto-populated based on [[Special:WhatLinksHere/Quadruple data rate]]. Needs checking by a human.
    441 bytes (58 words) - 19:50, 11 January 2010
  • {{r|Quadruple data rate}}
    479 bytes (64 words) - 16:04, 11 January 2010
  • ...AGP) 2x bus, [[DDR SDRAM]], and the [[HyperTransport]] version 3.0 bus. [[Quadruple data rate]] (QDR) has replaced DDR in many Front side buses (including in [[Intel]] [ An alternative to double or [[Quadruple data rate|quad pumping]] is to make the link [[Self-clocking signal|self-clocking]].
    3 KB (413 words) - 09:43, 26 September 2007