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- The '''instruction set architecture''', often called simply ISA, is the formal specification of a particular ty An instruction set architecture is a theoretical description, and says nothing about how instructions are '2 KB (364 words) - 10:41, 4 January 2022
- 12 bytes (1 word) - 19:24, 3 November 2007
- Auto-populated based on [[Special:WhatLinksHere/Instruction set architecture]]. Needs checking by a human.669 bytes (88 words) - 17:27, 11 January 2010
Page text matches
- #REDIRECT [[Instruction set architecture]]42 bytes (4 words) - 13:14, 23 September 2007
- The instruction set architecture for the Intel 8086 and 8088 chips, 16-bit microprocessors first produced in150 bytes (17 words) - 11:46, 26 June 2008
- ...tion word contains. In the case of simple fixed-length instruction word [[Instruction set architecture|ISA]]s (instruction set architectures), this is always the same number. Fo2 KB (253 words) - 13:22, 27 July 2008
- The '''instruction set architecture''', often called simply ISA, is the formal specification of a particular ty An instruction set architecture is a theoretical description, and says nothing about how instructions are '2 KB (364 words) - 10:41, 4 January 2022
- Auto-populated based on [[Special:WhatLinksHere/Instruction set architecture]]. Needs checking by a human.669 bytes (88 words) - 17:27, 11 January 2010
- {{r|Instruction set architecture}}497 bytes (64 words) - 19:44, 11 January 2010
- {{r|Instruction set architecture}}505 bytes (65 words) - 19:36, 11 January 2010
- {{r|Instruction set architecture}}576 bytes (76 words) - 11:34, 11 January 2010
- {{r|Instruction set architecture}}595 bytes (76 words) - 21:32, 11 January 2010
- {{r|Instruction set architecture}}606 bytes (79 words) - 20:34, 11 January 2010
- {{r|Instruction set architecture}}586 bytes (76 words) - 19:57, 11 January 2010
- {{r|Instruction set architecture}}980 bytes (151 words) - 14:51, 11 May 2010
- {{r|Instruction set architecture}}1 KB (187 words) - 13:39, 29 April 2011
- {{r|Instruction set architecture}}3 KB (353 words) - 03:48, 24 September 2013
- {{r|Instruction set architecture}}3 KB (441 words) - 12:55, 13 November 2014
- '''x86''' is the [[instruction set architecture]] (ISA) for the [[Intel 8086]] and [[Intel 8088|8088]] chips, 16-bit microp4 KB (561 words) - 14:55, 7 July 2009
- ...Arr. This type of array is implemented at the instruction level on many [[instruction set architecture|architectures]].3 KB (537 words) - 00:36, 9 February 2010
- * [[instruction set architecture]]7 KB (933 words) - 16:53, 16 February 2010
- ...ins said memory address. Pointers exist at the instruction level of all [[instruction set architecture|architectures]], and may also exist at the syntactic level of [[high-level5 KB (695 words) - 20:34, 21 January 2009
- ...a 680x0]]. A more precise designation for specifying such machines is ''[[instruction set architecture]]'' (ISA). In the 1980's, when computer architecture programs first began25 KB (3,906 words) - 12:07, 22 February 2009
- ...h the numerical instruction value is interpreted is defined by the CPU's [[instruction set architecture]] ('''ISA'''). Often, one group of bits in the instruction, called the [[op37 KB (5,596 words) - 21:55, 26 April 2008
- ...8-bit '''byte''' is the smallest addressable unit of information in the [[instruction set architecture]] (ISA) of most electronic computers today. In the history of computing, v ...s]], or meaning assigned to a given byte, is a matter defined within the [[instruction set architecture]] (ISA) of each type of computer. Many different encodings have been tried13 KB (2,022 words) - 22:48, 15 September 2013
- ...om that variable are changed into reads from a memory location. On some [[instruction set architecture|architectures]], most notably [[load-store architecture|load-store architec9 KB (1,338 words) - 10:00, 16 July 2013
- ...computer was an electronic monster able to read from a punch tape simple [[Instruction set architecture|instructions]] stipulated by the hardware and execute them quickly, thus pe34 KB (5,174 words) - 21:32, 25 October 2013