Quadruple data rate

From Citizendium
Revision as of 06:08, 30 December 2006 by imported>Howard Arvi Hughes
Jump to navigation Jump to search

Quadruple data rate (or quad pumping) is a microprocessor communication technique wherein data is transmitted four times for each clock cycle. The Front Side Bus for Intel's Pentium 4 and Core 2 Duo processors utilizes this technique to achieve an effective 800 MHz (200 MHz × 4),or 1066 MHz (266 MHz × 4). Xeon processors are capable of reaching an effective 1333 MHz bus (333 MHz x4) with this technique.

Quadruple data rate is also used in the Accelerated Graphics Port (AGP) bus.

See also