File:PDP-8i cpu.jpg: Difference between revisions

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imported>Matt Britt
(Image showing the internals of a PDP-8/I. Pictured are the CPU (including the major registers and an extended arithmetic unit), memory controller, 4 kilowords magnetic core memory, external bus interface, TTY interface, and paper punched tape interface. All the picture components are manufactured as discrete TTL MSI logic cards and plugged into a common backplane. Photograph taken by Robert Krten for his online [http://www.parse.com/~museum/pdp8/ PDP-8 Museum]....)
 
(== Summary == Importing file)
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Image showing the internals of a PDP-8/I.  Pictured are the [[Central processing unit|CPU]] (including the major registers and an extended arithmetic unit), memory controller, 4 kilowords magnetic core memory, external bus interface, TTY interface, and paper punched tape interface.  All the picture components are manufactured as discrete TTL MSI logic cards and plugged into a common backplane.
== Summary ==
 
Importing file
Photograph taken by Robert Krten for his online [http://www.parse.com/~museum/pdp8/ PDP-8 Museum]. Released into public domain by the author:
I, Robert Krten, the author and copyright holder of the image
identified as:
 
http://www.parse.com/~museum/pdp8/images/R00000259-hp.jpg
 
Hereby release it into the public domain.

Latest revision as of 18:54, 11 March 2022

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current18:54, 11 March 2022Thumbnail for version as of 18:54, 11 March 20221,600 × 1,200 (345 KB)Maintenance script (talk | contribs)== Summary == Importing file

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